1. Field of the Invention
This invention relates to a method for forming gate electrodes in integrated circuits and, more particularly, to a method for forming a gate electrode by a two-step deposition of a cap silicon nitride.
2. Description of the Prior Art
The packing density of the number of circuits on a semiconductor chip has been greatly enhanced along with reducing the size of the device and increasing the integration density. This has resulted in a tremendous improvement in the electrical property of the devices and in lowering of the manufacturing cost.
However, some problems have arisen with the continued reduction in the size of the devices. These problems arise because of, for example, the natural limit of the manufacturing process and the electrical properties of the devices. One of the process limitations is the inability to control the precision of the lithography. Another is the necessary repetition of processing steps when etching a thick isolation layer to open the contact window which is part of interconnect since a certain distance to gate must be maintained. This problem in etching control becomes much more serious in the manufacturing process of multi-layered polysilicon. Therefore, the process of self-aligned contact (SAC) has been developed to decrease the area of the contact window.
The technology of self-aligned contact has been applied on the source-drain contact of metal-oxide-semiconductor (MOS) in ultra large scale integrated circuits. The gate of the metal-oxide-semiconductor comprises, in general, the layers of metal, oxide and semiconductor. But due to the poor adhesion ability of most kinds of metals to silicon dioxide which is used as the oxide layer, polysilicon which posses excellent adhesive ability to silicon dioxide and compatibility with the process is widely used in place of metal in MOS. However, the resistively of polysilicon is still too high to be a conductor even after doping. Therefore, metal silicide which as better conductivity is incorporated with the polysilicon. This new metal layer comprising polysilicon and metal silicide provides excellent electrical characteristics for MOS operation. This metal layer including polysilicon and metal silicide is called polysilicon, among which the most popular material is tungsten silicide (Wsi.sub.x).
A conventional process to form the contact window of a source/drain is shown in FIG. 1. A polysilicon layer 20 and a tungsten silicide layer 30 are sequentially formed on the semiconductor substrate 10. Then a layer of silicon nitride (Si.sub.3 N.sub.4) is applied as a cap dielectric 40 and another layer of silicon nitride which is subsequently formed as sidewall spacers function together as isolation between source/drain and gate in a so-called self-aligned contact (SAC) process, in which the thickness of sidewall spacers ranges from 300 to 800 angstroms. The typical way to form silicon nitride is by low pressure chemical vapor deposition (LPCVD) at the temperature around 780 degrees C, for example, see U.S. Pat. No. 4,660,276 to Hsu of RCA (the entire disclosure of which is herein incorporated by reference). However, the phase transition of tungsten silicide will spontaneously take place at such a high temperature, so that undesirable effects including recrystallization of tungsten silicide and a rough interface between silicon nitride and tungsten silicide are unavoidably a result of this process. Meanwhile, the practices of silicon nitride will fall into the cracks and voids between the tungsten silicon grain boundaries, causing defects in the device.
In the following description some steps conventional steps are excluded to form the gate pattern. Lithography and etching are previously used to form a contact window, after the gate pattern on the silicon nitride is defined, the first etching 100 is performed to remove silicon nitride which was not covered by a photoresist pattern (not shown). The photoresist is then removed, and the second SAC etching 200 is performed to remove the silicide and polysilicon layers which are covered by the patterned silicon nitride, as shown in FIG. 2.
Worst of all, because silicon nitride which has already generated into the cracks and voids of the interface between silicon nitride and the tungsten silicide, cannot be totally cleared up during the first etching; silicon nitride residue 41 will be induced on the interface. Due to a large difference of etching selectivity between silicon nitride and tungsten silicide (about 1:4) during the second etching, the shape of the remaining silicon nitride residue 41 will further transfer to tungsten silicide and polysilicon, thus undesired polysilicon residue 21 will also be left over on the substrate.
The present invention relates to a method for forming a gate in which the silicon nitride residue on the interface is avoided. This reduces the problems associated with etching tungsten silicon and polysilicon due to the presence of silicon nitride residue as discussed above.